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| author | Icenowy Zheng <icenowy@aosc.io> | 2017-05-15 10:39:59 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-05-15 10:53:50 +0200 |
| commit | 37eac4f9c6e819238fd8d02e9597b1d15e23b6e1 (patch) | |
| tree | 445dc899e18685f4922cc8e5475669b05f3c6c86 /arch/arm/boot/dts/sun8i-v3s.dtsi | |
| parent | ARM: sun8i: v3s: restore the usage of CCU definitions (diff) | |
| download | linux-37eac4f9c6e819238fd8d02e9597b1d15e23b6e1.tar.xz linux-37eac4f9c6e819238fd8d02e9597b1d15e23b6e1.zip | |
ARM: sun8i: v3s: add LRADC device node
Allwinner V3s features a LRADC like the ones in older SoCs.
Add a device tree node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-v3s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-v3s.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 3b50fa580261..b9a3df941fb4 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -240,6 +240,13 @@ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; }; + lradc: lradc@1c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x400>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; |