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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-07-22 16:08:16 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-07-22 16:49:22 +0200 |
| commit | 5ea40f7106aaa4e2736d18075ca635389797fc16 (patch) | |
| tree | 529a53d8522df8f97496cc573d551a5054923735 /arch/arm/boot/dts/sunxi-h3-h5.dtsi | |
| parent | ARM: dts: sunxi: Switch from phy to phy-handle (diff) | |
| download | linux-5ea40f7106aaa4e2736d18075ca635389797fc16.tar.xz linux-5ea40f7106aaa4e2736d18075ca635389797fc16.zip | |
ARM: dts: sunxi: Unify the DE2 bus clocks order
The DE2 bus takes two clocks, named bus and mod according to the binding.
However, the order of these clocks change from one SoC to another. Even
though it might not be an issue in most cases, having consistency will help
if we ever need to have some code to deal with deprecated bindings, and in
general it's just better.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 84977d4eb97a..b1d8c8228a37 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -114,10 +114,10 @@ display_clocks: clock@1000000 { /* compatible is in per SoC .dtsi file */ reg = <0x01000000 0x100000>; - clocks = <&ccu CLK_DE>, - <&ccu CLK_BUS_DE>; - clock-names = "mod", - "bus"; + clocks = <&ccu CLK_BUS_DE>, + <&ccu CLK_DE>; + clock-names = "bus", + "mod"; resets = <&ccu RST_BUS_DE>; #clock-cells = <1>; #reset-cells = <1>; |