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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-08-09 18:43:30 +0200 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-08-15 18:47:01 +0200 |
| commit | 69f9cdc63319e5ccc210b30d1cec1dfda7096b04 (patch) | |
| tree | 87929645679b06441cdc474bb9fd2a02425df4ac /arch/arm/boot/dts/uniphier-ld4.dtsi | |
| parent | ARM: dts: uniphier use #include instead of /include/ (diff) | |
| download | linux-69f9cdc63319e5ccc210b30d1cec1dfda7096b04.tar.xz linux-69f9cdc63319e5ccc210b30d1cec1dfda7096b04.zip | |
ARM: dts: uniphier: add Denali NAND controller node
Add NAND controller node to LD4, Pro4, sLD8, Pro5, and PXs2.
Set up pinctrl to enable 2 chip select lines except Pro4. The CS1
for Pro4 is multiplexed with other peripherals such as UART2, so
I did not enable it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-ld4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ld4.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 5d3924c8568c..91410609b181 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -285,6 +285,17 @@ #reset-cells = <1>; }; }; + + nand: nand@68000000 { + compatible = "socionext,uniphier-denali-nand-v5a"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand2cs>; + clocks = <&sys_clk 2>; + }; }; }; |