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author | Simon Horman <horms+renesas@verge.net.au> | 2013-10-08 02:24:24 +0200 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2013-10-08 02:24:24 +0200 |
commit | 50128df2c0164a3510da2af9d2dfed2da3987bd3 (patch) | |
tree | 9334881e3e4ea360dc3005c35da204211155ccff /arch/arm/boot/dts | |
parent | ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI (diff) | |
parent | ARM: shmobile: r8a7778: add usb phy power control function (diff) | |
download | linux-50128df2c0164a3510da2af9d2dfed2da3987bd3.tar.xz linux-50128df2c0164a3510da2af9d2dfed2da3987bd3.zip |
Merge tag 'renesas-soc-for-v3.13' into dt2-base
Renesas ARM based SoC updates for v3.13
* Add support for r8a7791 SoC
* Rename DU device in clock lookups list of r8a7779 SoC
* USB and SSI/SRU clock support for r8a7778 SoC
* USB phy power control function support for r8a7778 SoC
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi new file mode 100644 index 000000000000..bbed43bd9be9 --- /dev/null +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -0,0 +1,41 @@ +/* + * Device Tree Source for the r8a7791 SoC + * + * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/ { + compatible = "renesas,r8a7791"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + clock-frequency = <1300000000>; + }; + }; + + gic: interrupt-controller@f1001000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0xf1001000 0 0x1000>, + <0 0xf1002000 0 0x1000>, + <0 0xf1004000 0 0x2000>, + <0 0xf1006000 0 0x2000>; + interrupts = <1 9 0xf04>; + }; +}; |