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| author | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-04 17:57:38 +0200 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-16 10:17:00 +0200 |
| commit | a03d8b1e4606be10c0fedf1ccabe22dc3a5060f9 (patch) | |
| tree | b8bf5e898c654b4f17bed019fcc1b0ec7038d67e /arch/arm/boot/dts | |
| parent | ARM: cache: add dt support for tauros2 cache (diff) | |
| download | linux-a03d8b1e4606be10c0fedf1ccabe22dc3a5060f9.tar.xz linux-a03d8b1e4606be10c0fedf1ccabe22dc3a5060f9.zip | |
ARM: mmp: enable tauros2 cache in pxa910
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/pxa910.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi index aebf32de73b4..a3be44d86bcd 100644 --- a/arch/arm/boot/dts/pxa910.dtsi +++ b/arch/arm/boot/dts/pxa910.dtsi @@ -25,6 +25,11 @@ interrupt-parent = <&intc>; ranges; + L2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0x3>; + }; + axi@d4200000 { /* AXI */ compatible = "mrvl,axi-bus", "simple-bus"; #address-cells = <1>; |