diff options
| author | Paweł Anikiel <pan@semihalf.com> | 2022-06-03 11:23:51 +0200 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2022-06-14 17:44:59 +0200 |
| commit | cfdb455d1a54b257c5f2740738055f746efe9dea (patch) | |
| tree | 0d786f7ce0cd29e891bbf088ca722632937fae3d /arch/arm/boot | |
| parent | ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi (diff) | |
| download | linux-cfdb455d1a54b257c5f2740738055f746efe9dea.tar.xz linux-cfdb455d1a54b257c5f2740738055f746efe9dea.zip | |
ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts
The ecc manager is a part of the Arria 10 SoC, move it to the correct
dts.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi | 12 |
2 files changed, 10 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 26bda2557fe8..4370e3cbbb4b 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -736,6 +736,16 @@ <37 IRQ_TYPE_LEVEL_HIGH>; }; + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; + dma-ecc@ff8c8000 { compatible = "altr,socfpga-dma-ecc"; reg = <0xff8c8000 0x400>; diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi index 4b21351f2694..b0d20101cd00 100644 --- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi @@ -23,18 +23,6 @@ }; }; -&eccmgr { - sdmmca-ecc@ff8c2c00 { - compatible = "altr,socfpga-sdmmc-ecc"; - reg = <0xff8c2c00 0x400>; - altr,ecc-parent = <&mmc>; - interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, - <47 IRQ_TYPE_LEVEL_HIGH>, - <16 IRQ_TYPE_LEVEL_HIGH>, - <48 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - &gmac0 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ |