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authorTroy Kisky <troy.kisky@boundarydevices.com>2013-12-17 02:12:55 +0100
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 14:29:24 +0100
commitd06d8785f774ba5c01a61ebcc6e0394048206e98 (patch)
treee5f307f4ffda3b19fd797365736e9c30c4d6834b /arch/arm/boot
parentARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1 (diff)
downloadlinux-d06d8785f774ba5c01a61ebcc6e0394048206e98.tar.xz
linux-d06d8785f774ba5c01a61ebcc6e0394048206e98.zip
ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotg
This patch moves pin EIM_D22(power enable) from pinctrl_hog to pinctrl_usbotg. It also explicitly sets the pad to 0x000b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 895d4d6810c4..9b78cf828584 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
@@ -183,6 +182,8 @@
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ /* power enable, high active */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
>;
};