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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-19 12:41:09 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-14 14:35:13 +0100
commit3d1074349b22c9653e746282564136c87668c2b8 (patch)
treeb86a8b3cfa5b63e218df8da66417a4ec5f229b0e /arch/arm/mach-iop32x/glantank.c
parentARM: cache-l2x0: avoid taking spinlock for every iteration (diff)
downloadlinux-3d1074349b22c9653e746282564136c87668c2b8.tar.xz
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ARM: cache-l2x0: make better use of background cache handling
There's no point having the hardware support background operations if we issue a cache operation, and then wait for it to complete before calculating the address of the next operation. We gain no advantage in the cache controller stalling the bus until completion. What we should be doing is using the 'wait' time productively by calculating the address of the next operation, and only then waiting for the previous operation to complete. This means that cache operations can occur in parallel with the CPU calculating the next address. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
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