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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-09-10 17:01:26 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-10-01 09:32:17 +0200 |
commit | 74d99f395901502747a44a1379f3b4fdb638dafa (patch) | |
tree | adc6607c0f451f7a65f9c552c7cebbbb42a56509 /arch/arm/mach-mx5 | |
parent | ARM: mx5/clock-mx51: refactor ccgr callbacks to use common code (diff) | |
download | linux-74d99f395901502747a44a1379f3b4fdb638dafa.tar.xz linux-74d99f395901502747a44a1379f3b4fdb638dafa.zip |
ARM: mx5/clock-mx51: new macro that defines a clk with all members
Acked-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r-- | arch/arm/mach-mx5/clock-mx51.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index fe658bf5b490..0e396981c27c 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -764,21 +764,21 @@ static struct clk kpp_clk = { .id = 0, }; -#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .set_rate = sr, \ - .enable = _clk_ccgr_enable, \ - .disable = _clk_ccgr_disable, \ - .parent = p, \ - .secondary = s, \ +#define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s) \ + static struct clk name = { \ + .id = i, \ + .enable_reg = er, \ + .enable_shift = es, \ + .get_rate = gr, \ + .set_rate = sr, \ + .enable = e, \ + .disable = d, \ + .parent = p, \ + .secondary = s, \ } -/* DEFINE_CLOCK(name, id, enable_reg, enable_shift, - get_rate, set_rate, parent, secondary); */ +#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ + DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, _clk_ccgr_enable, _clk_ccgr_disable, p, s) /* Shared peripheral bus arbiter */ DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET, |