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| author | Jamie Iles <jamie@jamieiles.com> | 2011-09-27 21:35:14 +0200 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2011-11-15 19:14:03 +0100 |
| commit | 66266f4ab8a049680cacf72ce792d967c12cd99a (patch) | |
| tree | d486bdb82542e26ed5a0a4f75935f8c05d60479e /arch/arm/mach-spear3xx/include/mach | |
| parent | ARM: s3c64xx: convert to MULTI_IRQ_HANDLER (diff) | |
| download | linux-66266f4ab8a049680cacf72ce792d967c12cd99a.tar.xz linux-66266f4ab8a049680cacf72ce792d967c12cd99a.zip | |
ARM: spear: convert to MULTI_IRQ_HANDLER
Now that there is a generic IRQ handler for multiple VIC devices use it
for spear to help building multi platform kernels.
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Diffstat (limited to 'arch/arm/mach-spear3xx/include/mach')
| -rw-r--r-- | arch/arm/mach-spear3xx/include/mach/entry-macro.S | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S index 53da4224ba3d..de3bb41c8e9e 100644 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S @@ -11,35 +11,8 @@ * warranty of any kind, whether express or implied. */ -#include <asm/hardware/vic.h> -#include <mach/hardware.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - teq \irqstat, #0 - beq 1001f @ this will set/reset - @ zero register - /* - * Following code will find bit position of least significang - * bit set in irqstat, using following equation - * least significant bit set in n = (n & ~(n-1)) - */ - sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 - mvn \tmp, \tmp @ tmp = ~tmp - and \irqstat, \irqstat, \tmp @ irqstat &= tmp - /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ - clz \tmp, \irqstat @ tmp = leading zeros - rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1 - -1001: /* EQ will be set if no irqs pending */ - .endm |