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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-02-06 18:29:53 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-08 15:49:37 +0100 |
| commit | 7f8e33546d17c7d8849be3a6623c3b6b3c9b588b (patch) | |
| tree | 4ddbbf921dde932f8ce83b519608f945ae43a120 /arch/arm/mm/consistent.c | |
| parent | [ARM] 4133/1: Add ISB after changes to CP15 registers (diff) | |
| download | linux-7f8e33546d17c7d8849be3a6623c3b6b3c9b588b.tar.xz linux-7f8e33546d17c7d8849be3a6623c3b6b3c9b588b.zip | |
[ARM] Don't call consistent_sync() for DMA coherent memory
Memory allocated by the coherent memory allocators will be marked
uncacheable, which means it's pointless calling consistent_sync()
to perform cache maintainence on this memory; it's just a waste of
CPU cycles.
Moreover, with the (subsequent) merge of outer cache support, it
actually breaks things to call consistent_sync() on anything but
direct-mapped memory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/consistent.c')
0 files changed, 0 insertions, 0 deletions