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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-01 18:44:24 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-11-02 17:59:59 +0100
commit4b46d6416548fb6a0940dfd9911fd895eb6247b3 (patch)
treec2a890342019c9df5e6187ad185a28208b786341 /arch/arm/mm/mmu.c
parentARM: 5776/1: Check compiler version and EABI support when adding ARM unwind s... (diff)
downloadlinux-4b46d6416548fb6a0940dfd9911fd895eb6247b3.tar.xz
linux-4b46d6416548fb6a0940dfd9911fd895eb6247b3.zip
ARM: ensure initial page tables are setup for SMP systems
Mapping the same memory using two different attributes (memory type, shareability, cacheability) is unpredictable. During boot, we encounter a situation when we're updating the kernel's page tables which can lead to dirty cache lines existing in the cache which are subsequently missed. This causes stack corruption, and therefore a crash. Therefore, ensure that the shared and cacheability settings matches the configuration that will be used later; this together with the restriction in early_cachepolicy() ensures that we won't create a mismatch during boot. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 02243eeccf50..ea67be0223ac 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p)
}
if (i == ARRAY_SIZE(cache_policies))
printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
+ /*
+ * This restriction is partly to do with the way we boot; it is
+ * unpredictable to have memory mapped using two different sets of
+ * memory attributes (shared, type, and cache attribs). We can not
+ * change these attributes once the initial assembly has setup the
+ * page tables.
+ */
if (cpu_architecture() >= CPU_ARCH_ARMv6) {
printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
cachepolicy = CPOLICY_WRITEBACK;