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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-02-18 09:59:09 +0100
committerTony Lindgren <tony@atomide.com>2010-02-23 19:57:40 +0100
commit35c0dc389d42c3d8c20ecdf0829fe9e935084b10 (patch)
treed06c768d831dbcdee4894397cb00421d7c38b335 /arch/arm/plat-omap
parentomap4: sdma: Enable the idle modes on omap4 (diff)
downloadlinux-35c0dc389d42c3d8c20ecdf0829fe9e935084b10.tar.xz
linux-35c0dc389d42c3d8c20ecdf0829fe9e935084b10.zip
omap: sdma: Limit the secure reserve channel fix for omap3
The commit 'ba50ea7e' reserves DMA channels 0 and 1 on high security devices, in order to avoid collision between kernel dma transfers and ROM code dma transfers. This fix is applicable only for OMAP3 so add an appropriate check. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> CC: Kalle Jokiniemi <kalle.jokiniemi@digia.com> CC: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/dma.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5ec96db83779..049165c9aaad 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2149,7 +2149,8 @@ static int __init omap_init_dma(void)
DMA_SYSCONFIG_AUTOIDLE);
dma_write(v , OCP_SYSCONFIG);
/* reserve dma channels 0 and 1 in high security devices */
- if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+ if (cpu_is_omap34xx() &&
+ (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
"HS ROM code\n");
dma_chan[0].dev_id = 0;