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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-08-09 13:44:58 +0200 |
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committer | Lennert Buytenhek <buytenh@marvell.com> | 2008-08-09 13:44:58 +0200 |
commit | 6f088f1d215be5250582b974f83f0e3aa6ad3a28 (patch) | |
tree | f79585741cad29fa9fe9202bf830104815335758 /arch/arm/plat-orion | |
parent | [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach (diff) | |
download | linux-6f088f1d215be5250582b974f83f0e3aa6ad3a28.tar.xz linux-6f088f1d215be5250582b974f83f0e3aa6ad3a28.zip |
[ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat
This patch performs the equivalent include directory shuffle for
plat-orion, and fixes up all users.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/include/plat/cache-feroceon-l2.h | 11 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/ehci-orion.h | 19 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/irq.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/mv_xor.h | 30 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/orion_nand.h | 25 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/pcie.h | 32 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/time.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-orion/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-orion/pcie.c | 2 |
9 files changed, 153 insertions, 2 deletions
diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h new file mode 100644 index 000000000000..06f982d55697 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h @@ -0,0 +1,11 @@ +/* + * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +extern void __init feroceon_l2_init(int l2_wt_override); diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h new file mode 100644 index 000000000000..64343051095a --- /dev/null +++ b/arch/arm/plat-orion/include/plat/ehci-orion.h @@ -0,0 +1,19 @@ +/* + * arch/arm/plat-orion/include/plat/ehci-orion.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_EHCI_ORION_H +#define __PLAT_EHCI_ORION_H + +#include <linux/mbus.h> + +struct orion_ehci_data { + struct mbus_dram_target_info *dram; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h new file mode 100644 index 000000000000..f05eeab94968 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/irq.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/irq.h + * + * Marvell Orion SoC IRQ handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_IRQ_H +#define __PLAT_IRQ_H + +void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h new file mode 100644 index 000000000000..bd5f3bdb4ae3 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/mv_xor.h @@ -0,0 +1,30 @@ +/* + * arch/arm/plat-orion/include/plat/mv_xor.h + * + * Marvell XOR platform device data definition file. + */ + +#ifndef __PLAT_MV_XOR_H +#define __PLAT_MV_XOR_H + +#include <linux/dmaengine.h> +#include <linux/mbus.h> + +#define MV_XOR_SHARED_NAME "mv_xor_shared" +#define MV_XOR_NAME "mv_xor" + +struct mbus_dram_target_info; + +struct mv_xor_platform_shared_data { + struct mbus_dram_target_info *dram; +}; + +struct mv_xor_platform_data { + struct platform_device *shared; + int hw_id; + dma_cap_mask_t cap_mask; + size_t pool_size; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h new file mode 100644 index 000000000000..d6a4cfa37785 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/orion_nand.h @@ -0,0 +1,25 @@ +/* + * arch/arm/plat-orion/include/plat/orion_nand.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_ORION_NAND_H +#define __PLAT_ORION_NAND_H + +/* + * Device bus NAND private data + */ +struct orion_nand_data { + struct mtd_partition *parts; + u32 nr_parts; + u8 ale; /* address line number connected to ALE */ + u8 cle; /* address line number connected to CLE */ + u8 width; /* buswidth */ + u8 chip_delay; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h new file mode 100644 index 000000000000..3ebfef72b4e7 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -0,0 +1,32 @@ +/* + * arch/arm/plat-orion/include/plat/pcie.h + * + * Marvell Orion SoC PCIe handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PCIE_H +#define __PLAT_PCIE_H + +u32 orion_pcie_dev_id(void __iomem *base); +u32 orion_pcie_rev(void __iomem *base); +int orion_pcie_link_up(void __iomem *base); +int orion_pcie_x4_mode(void __iomem *base); +int orion_pcie_get_local_bus_nr(void __iomem *base); +void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_setup(void __iomem *base, + struct mbus_dram_target_info *dram); +int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 val); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h new file mode 100644 index 000000000000..c06ca35f3613 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/time.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/time.h + * + * Marvell Orion SoC time handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_TIME_H +#define __PLAT_TIME_H + +void orion_time_init(unsigned int irq, unsigned int tclk); + + +#endif diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index fe66a1835169..3f9d34fc738c 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> static void orion_irq_mask(u32 irq) { diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index ca32c60e14d7..883902fead89 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -12,7 +12,7 @@ #include <linux/pci.h> #include <linux/mbus.h> #include <asm/mach/pci.h> -#include <asm/plat-orion/pcie.h> +#include <plat/pcie.h> /* * PCIe unit register offsets. |