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author | Ben Dooks <ben-linux@fluff.org> | 2008-12-02 20:34:52 +0100 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-16 11:32:02 +0100 |
commit | e7aa6f46f6e4644d466e04f54b5750a91d188abf (patch) | |
tree | c315b72953c6b9b0c80ed64221895516784941af /arch/arm/plat-s3c | |
parent | [ARM] S3C: Fix scaler1 clock rate information (diff) | |
download | linux-e7aa6f46f6e4644d466e04f54b5750a91d188abf.tar.xz linux-e7aa6f46f6e4644d466e04f54b5750a91d188abf.zip |
[ARM] S3C: Add UART FIFO selection during arch decompression
Add a configuration option to start the UART FIFOs during the
decompressions sequence to improve boot time when the bootloader
fails to enable the UART FIFOs.
For example, the SMDK6410 UBoot 1.1.6 leaves the FIFOs off.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c')
-rw-r--r-- | arch/arm/plat-s3c/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/uncompress.h | 28 |
2 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index 31656c33e05e..10c1dd3cd463 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -57,6 +57,14 @@ config S3C_BOOT_ERROR_RESET Say y here to use the watchdog to reset the system if the kernel decompressor detects an error during decompression. +config S3C_BOOT_UART_FORCE_FIFO + bool "Force UART FIFO on during boot process" + depends on PLAT_S3C + default y + help + Say Y here to force the UART FIFOs on during the kernel + uncompressor + comment "Power management" config S3C2410_PM_DEBUG diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 8a8a927292e0..2c39a309aeb0 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -139,6 +139,28 @@ static void arch_decomp_error(const char *x) static void error(char *err); +#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO +static inline void arch_enable_uart_fifo(void) +{ + u32 fifocon = uart_rd(S3C2410_UFCON); + + if (!(fifocon & S3C2410_UFCON_FIFOMODE)) { + fifocon |= S3C2410_UFCON_RESETBOTH; + uart_wr(S3C2410_UFCON, fifocon); + + /* wait for fifo reset to complete */ + while (1) { + fifocon = uart_rd(S3C2410_UFCON); + if (!(fifocon & S3C2410_UFCON_RESETBOTH)) + break; + } + } +} +#else +#define arch_enable_uart_fifo() do { } while(0) +#endif + + static void arch_decomp_setup(void) { @@ -149,6 +171,12 @@ arch_decomp_setup(void) arch_detect_cpu(); arch_decomp_wdog_start(); + + /* Enable the UART FIFOs if they where not enabled and our + * configuration says we should turn them on. + */ + + arch_enable_uart_fifo(); } |