diff options
| author | Peng Fan <peng.fan@nxp.com> | 2022-01-11 07:20:13 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-02-11 04:16:17 +0100 |
| commit | 591de9fb73b7c9924800a8d1192789d8c2625160 (patch) | |
| tree | 49d7e31189d76bcc0645addecc0e04e87d72ab94 /arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | |
| parent | arm64: dts: imx8qm: Add SCU RTC node (diff) | |
| download | linux-591de9fb73b7c9924800a8d1192789d8c2625160.tar.xz linux-591de9fb73b7c9924800a8d1192789d8c2625160.zip | |
arm64: dts: imx8: add mu5/6 node
Add mu5/6 for i.MX8QXP/QM, these two mu will be used for
communicating with general purpose Cortex-M4 cores.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index ee4e585a9c39..6446e6df7a9a 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -141,6 +141,22 @@ lsio_subsys: bus@5d000000 { status = "disabled"; }; + lsio_mu5: mailbox@5d200000 { + reg = <0x5d200000 0x10000>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + power-domains = <&pd IMX_SC_R_MU_5A>; + status = "disabled"; + }; + + lsio_mu6: mailbox@5d210000 { + reg = <0x5d210000 0x10000>; + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + power-domains = <&pd IMX_SC_R_MU_6A>; + status = "disabled"; + }; + lsio_mu13: mailbox@5d280000 { reg = <0x5d280000 0x10000>; interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |