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authorKishon Vijay Abraham I <kishon@ti.com>2021-09-15 07:53:54 +0200
committerNishanth Menon <nm@ti.com>2021-09-20 20:51:09 +0200
commit5f46633565b1c1e1840a927676065d72b442dac4 (patch)
treed5c192a1779a4857c5f17638b3b8110f7efb58e9 /arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dts
parentarm64: dts: ti: k3-j721e-main: Fix "max-virtual-functions" in PCIe EP nodes (diff)
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arm64: dts: ti: k3-j721e-main: Fix "bus-range" upto 256 bus number for PCIe
commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") restricted PCIe bus numbers from 0 to 15 (due to SMMU restriction in J721E). However since SMMU is not enabled, allow the full supported bus numbers from 0 to 255. Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210915055358.19997-3-kishon@ti.com
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dts')
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