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| author | Dinh Nguyen <dinguyen@kernel.org> | 2023-01-23 19:12:38 +0100 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2023-01-23 20:42:40 +0100 |
| commit | 21ab7031cbff8c6b6f608234e18ffe0473e98f9d (patch) | |
| tree | 7e4168511e4cda3f99b3ff4e2f54de5af313a104 /arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | |
| parent | ARM: dts: socfpga: align UART node name with bindings (diff) | |
| download | linux-21ab7031cbff8c6b6f608234e18ffe0473e98f9d.tar.xz linux-21ab7031cbff8c6b6f608234e18ffe0473e98f9d.zip | |
arm64: dts: add pinctrl-single property for Stratix10/Agilex
The Stratix10/Agilex has a pin control IP that can make use of the
pinctrl-single driver.
Add the pinctrl-single dts property for the Stratix10/Agilex
platforms.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: no changes
Diffstat (limited to 'arch/arm64/boot/dts/intel/socfpga_agilex.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 849b46dd8098..f22302a19796 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -357,6 +357,21 @@ clock-names = "apb_pclk"; }; + pinctrl0: pinctrl@ffd13000 { + compatible = "pinctrl-single"; + #pinctrl-cells = <1>; + reg = <0xffd13000 0xa0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + }; + + pinctrl1: pinconf@ffd13100 { + compatible = "pinctrl-single"; + #pinctrl-cells = <1>; + reg = <0xffd13100 0x20>; + pinctrl-single,register-width = <32>; + }; + rst: rstmgr@ffd11000 { #reset-cells = <1>; compatible = "altr,stratix10-rst-mgr"; |