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| author | Thierry Reding <treding@nvidia.com> | 2021-11-12 13:35:37 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 16:51:00 +0100 |
| commit | 7fa307524a4d721d4a04523018509882c5414e72 (patch) | |
| tree | bb3cd10b42ee53dbe47f2fbabdeeda428d8eb571 /arch/arm64/boot/dts/nvidia/tegra194.dtsi | |
| parent | Merge tag 'tegra-for-5.17-dt-bindings-memory' into for-5.17/arm64/dt (diff) | |
| download | linux-7fa307524a4d721d4a04523018509882c5414e72.tar.xz linux-7fa307524a4d721d4a04523018509882c5414e72.zip | |
arm64: tegra: Fixup SYSRAM references
The json-schema bindings for SRAM expect the nodes to be called "sram"
rather than "sysram" or "shmem". Furthermore, place the brackets around
the SYSRAM references such that a two-element array is created rather
than a two-element array nested in a single-element array. This is not
relevant for device tree itself, but allows the nodes to be properly
validated against json-schema bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra194.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 851e049b3519..8d29b7fdb044 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -2467,7 +2467,7 @@ compatible = "nvidia,tegra186-bpmp"; mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>; - shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; + shmem = <&cpu_bpmp_tx>, <&cpu_bpmp_rx>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; |