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| author | Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> | 2021-02-16 10:47:49 +0100 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-03-12 03:22:39 +0100 |
| commit | 29a3349543e4ce3fe4e2a761403cc629e3534c67 (patch) | |
| tree | 2d34dd4187e4dcaf5f610606472e510fd2f1994c /arch/arm64/boot/dts/qcom/sm8250.dtsi | |
| parent | arm64: dts: qcom: sm8350: Fix level triggered PMU interrupt polarity (diff) | |
| download | linux-29a3349543e4ce3fe4e2a761403cc629e3534c67.tar.xz linux-29a3349543e4ce3fe4e2a761403cc629e3534c67.zip | |
arm64: dts: qcom: sm8250: Fix timer interrupt to specify EL2 physical timer
ARM architected timer interrupts DT property specifies EL2/HYP
physical interrupt and not EL2/HYP virtual interrupt for the 4th
interrupt property. As per interrupt documentation for SM8250 SoC,
the EL2/HYP physical timer interrupt is 10 and EL2/HYP virtual timer
interrupt is 12, so fix the 4th timer interrupt to be EL2 physical
timer interrupt (10 in this case).
Fixes: 60378f1a171e ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/744e58f725d279eb2b049a7da42b0f09189f4054.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8250.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index f1a07b504809..e357181b1a80 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3754,7 +3754,7 @@ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 12 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; |