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| author | Mark Brown <broonie@kernel.org> | 2022-05-03 19:02:28 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2022-05-04 16:30:28 +0200 |
| commit | 0eda2ec48907f0ec8c283306c98f28d13e43dafd (patch) | |
| tree | 0a0a1ae122aa8c174a0bbc5d5a47aa25283fb41c /arch/arm64/include/asm/archrandom.h | |
| parent | arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM (diff) | |
| download | linux-0eda2ec48907f0ec8c283306c98f28d13e43dafd.tar.xz linux-0eda2ec48907f0ec8c283306c98f28d13e43dafd.zip | |
arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names
The macros for accessing fields in ID_AA64ISAR0_EL1 omit the _EL1 from the
name of the register. In preparation for converting this register to be
automatically generated update the names to include an _EL1, there should
be no functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220503170233.507788-8-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/archrandom.h')
| -rw-r--r-- | arch/arm64/include/asm/archrandom.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/archrandom.h b/arch/arm64/include/asm/archrandom.h index d1bb5e71df25..3a6b6d38c5b8 100644 --- a/arch/arm64/include/asm/archrandom.h +++ b/arch/arm64/include/asm/archrandom.h @@ -142,7 +142,7 @@ static inline bool __init __early_cpu_has_rndr(void) { /* Open code as we run prior to the first call to cpufeature. */ unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1); - return (ftr >> ID_AA64ISAR0_RNDR_SHIFT) & 0xf; + return (ftr >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf; } static inline bool __init __must_check |