diff options
| author | Fuad Tabba <tabba@google.com> | 2021-05-24 10:29:57 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-05-25 20:27:49 +0200 |
| commit | f749448edb9c98bece0aeec5536260a8794af24b (patch) | |
| tree | ee4656c05b492eec7b5ada9e383a4d915ce5b351 /arch/arm64/include/asm/cacheflush.h | |
| parent | arm64: __clean_dcache_area_poc to take end parameter instead of size (diff) | |
| download | linux-f749448edb9c98bece0aeec5536260a8794af24b.tar.xz linux-f749448edb9c98bece0aeec5536260a8794af24b.zip | |
arm64: __clean_dcache_area_pop to take end parameter instead of size
To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.
No functional change intended.
Reported-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-15-tabba@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/cacheflush.h')
| -rw-r--r-- | arch/arm64/include/asm/cacheflush.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h index 3255878d6f30..fa5641868d65 100644 --- a/arch/arm64/include/asm/cacheflush.h +++ b/arch/arm64/include/asm/cacheflush.h @@ -61,7 +61,7 @@ extern void invalidate_icache_range(unsigned long start, unsigned long end); extern void __flush_dcache_area(unsigned long start, unsigned long end); extern void __inval_dcache_area(unsigned long start, unsigned long end); extern void __clean_dcache_area_poc(unsigned long start, unsigned long end); -extern void __clean_dcache_area_pop(void *addr, size_t len); +extern void __clean_dcache_area_pop(unsigned long start, unsigned long end); extern void __clean_dcache_area_pou(void *addr, size_t len); extern long __flush_cache_user_range(unsigned long start, unsigned long end); extern void sync_icache_aliases(void *kaddr, unsigned long len); |