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author | Abhimanyu Kapur <abhimany@codeaurora.org> | 2015-09-12 19:44:39 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-04 18:49:27 +0200 |
commit | 4cad4c57e0b3e90555a81e79ac7e82b253979697 (patch) | |
tree | 8613453d6b99db631b57e2adcf33739e8feb69c3 /arch/arm64/include/asm/dcc.h | |
parent | hvc_dcc: don't ignore errors during initialization (diff) | |
download | linux-4cad4c57e0b3e90555a81e79ac7e82b253979697.tar.xz linux-4cad4c57e0b3e90555a81e79ac7e82b253979697.zip |
ARM64: TTY: hvc_dcc: Add support for ARM64 dcc
Add support for debug communications channel based
hvc console for arm64 cpus.
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm64/include/asm/dcc.h')
-rw-r--r-- | arch/arm64/include/asm/dcc.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/dcc.h b/arch/arm64/include/asm/dcc.h new file mode 100644 index 000000000000..65e0190e97c8 --- /dev/null +++ b/arch/arm64/include/asm/dcc.h @@ -0,0 +1,55 @@ +/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A call to __dcc_getchar() or __dcc_putchar() is typically followed by + * a call to __dcc_getstatus(). We want to make sure that the CPU does + * not speculative read the DCC status before executing the read or write + * instruction. That's what the ISBs are for. + * + * The 'volatile' ensures that the compiler does not cache the status bits, + * and instead reads the DCC register every time. + */ +#ifndef __ASM_DCC_H +#define __ASM_DCC_H + +#include <asm/barrier.h> + +static inline u32 __dcc_getstatus(void) +{ + u32 ret; + + asm volatile("mrs %0, mdccsr_el0" : "=r" (ret)); + + return ret; +} + +static inline char __dcc_getchar(void) +{ + char c; + + asm volatile("mrs %0, dbgdtrrx_el0" : "=r" (c)); + isb(); + + return c; +} + +static inline void __dcc_putchar(char c) +{ + /* + * The typecast is to make absolutely certain that 'c' is + * zero-extended. + */ + asm volatile("msr dbgdtrtx_el0, %0" + : : "r" ((unsigned long)(unsigned char)c)); + isb(); +} + +#endif |