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| author | Will Deacon <will.deacon@arm.com> | 2014-03-10 11:36:52 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-03-10 12:57:40 +0100 |
| commit | d152d22a18c240286c19997a6249ee76ea055926 (patch) | |
| tree | 8f2c88c264c7031e139c2016e7edd6e7bd1a2d0f /arch/arm64/include/asm | |
| parent | arm64: topology: Implement basic CPU topology support (diff) | |
| download | linux-d152d22a18c240286c19997a6249ee76ea055926.tar.xz linux-d152d22a18c240286c19997a6249ee76ea055926.zip | |
arm64: barriers: add dmb barrier
Commit 8adbf57fc429 ("irqchip: gic: use dmb ishst instead of dsb when
raising a softirq") added an explicit dmb(...) call to the GIC driver.
This patch adds a simple dmb() macro to arm64, which expands to a DMB SY
instruction.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm')
| -rw-r--r-- | arch/arm64/include/asm/barrier.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 409ca370cfe2..66eb7648043b 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -25,6 +25,7 @@ #define wfi() asm volatile("wfi" : : : "memory") #define isb() asm volatile("isb" : : : "memory") +#define dmb(opt) asm volatile("dmb sy" : : : "memory") #define dsb(opt) asm volatile("dsb sy" : : : "memory") #define mb() dsb() |