diff options
| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2022-12-29 11:05:09 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-12-29 17:39:43 +0100 |
| commit | 2ef3bb17c45c5b83204a845bbe4045eed11bc759 (patch) | |
| tree | d66f82e45ad911fff800bd5d6c07bd75b65f60e4 /arch/arm64 | |
| parent | arm64: dts: qcom: sm8250: add cache size (diff) | |
| download | linux-2ef3bb17c45c5b83204a845bbe4045eed11bc759.tar.xz linux-2ef3bb17c45c5b83204a845bbe4045eed11bc759.zip | |
arm64: dts: qcom: sm8150: Add DISPCC node
Years after the SoC support has been added, it's high time for it to
get dispcc going. Add the node to ensure that.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Xperia 5
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229100511.979972-2-konrad.dybcio@linaro.org
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8150.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 70d436dd158a..4838091d8368 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3594,6 +3594,29 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + dispcc: clock-controller@af00000 { + compatible = "qcom,sm8150-dispcc"; + reg = <0 0x0af00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>; + clock-names = "bi_tcxo", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk"; + power-domains = <&rpmhpd SM8150_MMCX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sm8150-pdc", "qcom,pdc"; reg = <0 0x0b220000 0 0x400>; |