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authorPaolo Bonzini <pbonzini@redhat.com>2019-10-22 13:31:29 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2019-10-22 13:31:29 +0200
commit9800c24e2feaa662e83ded527a0c8a5186f66135 (patch)
tree94cc7ae0912e21ff5377facb6c141c3e203447e8 /arch/arm64
parentkvm: clear kvmclock MSR on reset (diff)
parentKVM: arm64: pmu: Reset sample period on overflow handling (diff)
downloadlinux-9800c24e2feaa662e83ded527a0c8a5186f66135.tar.xz
linux-9800c24e2feaa662e83ded527a0c8a5186f66135.zip
Merge tag 'kvmarm-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm fixes for 5.4, take #2 Special PMU edition: - Fix cycle counter truncation - Fix cycle counter overflow limit on pure 64bit system - Allow chained events to be actually functional - Correct sample period after overflow
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/kvm/sys_regs.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2071260a275b..46822afc57e0 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -632,6 +632,8 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
*/
val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
+ if (!system_supports_32bit_el0())
+ val |= ARMV8_PMU_PMCR_LC;
__vcpu_sys_reg(vcpu, r->reg) = val;
}
@@ -682,6 +684,8 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
val = __vcpu_sys_reg(vcpu, PMCR_EL0);
val &= ~ARMV8_PMU_PMCR_MASK;
val |= p->regval & ARMV8_PMU_PMCR_MASK;
+ if (!system_supports_32bit_el0())
+ val |= ARMV8_PMU_PMCR_LC;
__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
kvm_pmu_handle_pmcr(vcpu, val);
kvm_vcpu_pmu_restore_guest(vcpu);