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authorThomas Gleixner <tglx@linutronix.de>2019-05-17 15:48:06 +0200
committerThomas Gleixner <tglx@linutronix.de>2019-05-17 15:48:06 +0200
commitea7a5f90f103591f1f38dede52e731ec95ef3c55 (patch)
tree3f11930376131fd86fe5390ab7e32c38ca5658f6 /arch/arm
parenttick: Fix typos in comments (diff)
parentmisc: atmel_tclib: Do not probe already used TCBs (diff)
downloadlinux-ea7a5f90f103591f1f38dede52e731ec95ef3c55.tar.xz
linux-ea7a5f90f103591f1f38dede52e731ec95ef3c55.zip
Merge tag 'timers-v5.2' of http://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clockevent updates from Daniel Lezcano: - Add compatible string for suniv for sun4i (Mesih Kilinc) - Add COMPILE_TEST option for sp804 (David Abdurachmanov) - Replace the compensation time when suspend happens on tegra with the one provided by the generic framework (Joseph Lo) - Cleanup, shutdown and oneshot mode fix on milbeaut timer (Sugaya Taichi) - Atmel TCB rework to fix boot failure on boards without PIT or misfunction on system using a preempt-rt kernel (Alexandre Belloni)
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91/Kconfig23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 903f23c309df..da1d97a06c53 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -107,6 +107,29 @@ config SOC_AT91SAM9
AT91SAM9X35
AT91SAM9XE
+comment "Clocksource driver selection"
+
+config ATMEL_CLOCKSOURCE_PIT
+ bool "Periodic Interval Timer (PIT) support"
+ depends on SOC_AT91SAM9 || SOC_SAMA5
+ default SOC_AT91SAM9 || SOC_SAMA5
+ select ATMEL_PIT
+ help
+ Select this to get a clocksource based on the Atmel Periodic Interval
+ Timer. It has a relatively low resolution and the TC Block clocksource
+ should be preferred.
+
+config ATMEL_CLOCKSOURCE_TCB
+ bool "Timer Counter Blocks (TCB) support"
+ default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5
+ select ATMEL_TCB_CLKSRC
+ help
+ Select this to get a high precision clocksource based on a
+ TC block with a 5+ MHz base clock rate.
+ On platforms with 16-bit counters, two timer channels are combined
+ to make a single 32-bit timer.
+ It can also be used as a clock event device supporting oneshot mode.
+
config HAVE_AT91_UTMI
bool