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authorDanila Tikhonov <danila@jiaxyga.com>2024-04-23 22:32:45 +0200
committerLinus Walleij <linus.walleij@linaro.org>2024-05-03 09:55:04 +0200
commit5ed79863fae5c06eb33f5cd6b6bdf22dd7089392 (patch)
tree35cbd17c35ff6bed0bd4f7257082b267f5910d51 /arch/m68k
parentdt-bindings: pinctrl: mediatek: mt7622: add "antsel" function (diff)
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pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs
SDC1 and UFS_RESET special pins are located in the west memory bank. SDC1 have address 0x359a000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000 UFS_RESET have address 0x359f000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000 Fixes: b915395c9e04 ("pinctrl: qcom: Add SM7150 pinctrl driver") Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Message-ID: <20240423203245.188480-1-danila@jiaxyga.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/m68k')
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