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author | Chen Jie <chenj@lemote.com> | 2014-08-15 10:56:58 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-09-22 13:35:46 +0200 |
commit | 3c09bae43ba92a07a6a7b7d42360deb32d289cc0 (patch) | |
tree | 7648425d5b309e76a60612ca46ba4b88bfdf729b /arch/mips/include/asm/cpu-features.h | |
parent | Linux 3.17-rc6 (diff) | |
download | linux-3c09bae43ba92a07a6a7b7d42360deb32d289cc0.tar.xz linux-3c09bae43ba92a07a6a7b7d42360deb32d289cc0.zip |
MIPS: Use WSBH/DSBH/DSHD on Loongson 3A
Signed-off-by: chenj <chenj@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: chenhc@lemote.com
Patchwork: https://patchwork.linux-mips.org/patch/7542/
Patchwork: https://patchwork.linux-mips.org/patch/7550/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r-- | arch/mips/include/asm/cpu-features.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index e079598ae051..3325f3eb248c 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -231,6 +231,16 @@ #define cpu_has_clo_clz cpu_has_mips_r #endif +/* + * MIPS32 R2, MIPS64 R2, Loongson 3A and Octeon have WSBH. + * MIPS64 R2, Loongson 3A and Octeon have WSBH, DSBH and DSHD. + * This indicates the availability of WSBH and in case of 64 bit CPUs also + * DSBH and DSHD. + */ +#ifndef cpu_has_wsbh +#define cpu_has_wsbh cpu_has_mips_r2 +#endif + #ifndef cpu_has_dsp #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif |