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authorDavid Daney <david.daney@cavium.com>2015-01-15 14:11:14 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-02-20 15:31:43 +0100
commitdebe6a623d3cdc7f0374124830587fb8d1a04b63 (patch)
tree002af15bade64c15267e300e9a143eb09ca82d8e /arch/mips/include/asm/mach-cavium-octeon
parentMIPS: OCTEON: Implement DCache errata workaround for all CN6XXX (diff)
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MIPS: OCTEON: Update octeon-model.h code for new SoCs.
Add coverage for OCTEON III models. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8942/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon')
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