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authorRalf Baechle <ralf@linux-mips.org>2011-11-28 17:11:28 +0100
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 23:01:45 +0100
commit3d18c98367eac23555ea4887c4f570423474eeaf (patch)
tree4f9e12003a5acf46c1aea74e7835b4e72814bf93 /arch/mips/include/asm/pgtable-32.h
parentMIPS: Fix up inconsistency in panic() string argument. (diff)
downloadlinux-3d18c98367eac23555ea4887c4f570423474eeaf.tar.xz
linux-3d18c98367eac23555ea4887c4f570423474eeaf.zip
MIPS: Fix Jazz 64-bit build error.
Move add_wired_entry to its own header file from where it will be always included. Patch up other users of add_wired_entry to also include the header as needed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/pgtable-32.h')
-rw-r--r--arch/mips/include/asm/pgtable-32.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
index 8a153d2fa62a..469390656c3f 100644
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -19,12 +19,6 @@
#include <asm-generic/pgtable-nopmd.h>
/*
- * - add_wired_entry() add a fixed TLB entry, and move wired register
- */
-extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask);
-
-/*
* - add_temporary_entry() add a temporary TLB entry. We use TLB entries
* starting at the top and working down. This is for populating the
* TLB before trap_init() puts the TLB miss handler in place. It