diff options
| author | Zhou Yanjie <zhouyanjie@zoho.com> | 2019-08-02 10:27:37 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-08-06 03:30:45 +0200 |
| commit | 053951dda71ecb4b554a2cdbe26f5f6f9bee9dd2 (patch) | |
| tree | bc5f96fe93a333b97db884157b188a37c4e69c23 /arch/mips/kernel/cpu-probe.c | |
| parent | MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache. (diff) | |
| download | linux-053951dda71ecb4b554a2cdbe26f5f6f9bee9dd2.tar.xz linux-053951dda71ecb4b554a2cdbe26f5f6f9bee9dd2.zip | |
MIPS: Ingenic: Disable broken BTB lookup optimization.
In order to further reduce power consumption, the XBurst core
by default attempts to avoid branch target buffer lookups by
detecting & special casing loops. This feature will cause
BogoMIPS and lpj calculate in error. Set cp0 config7 bit 4 to
disable this feature.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: ralf@linux-mips.org
Cc: paul@crapouillou.net
Cc: jhogan@kernel.org
Cc: malat@debian.org
Cc: gregkh@linuxfoundation.org
Cc: tglx@linutronix.de
Cc: allison@lohutok.net
Cc: syq@debian.org
Cc: chenhc@lemote.com
Cc: jiaxun.yang@flygoat.com
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 634e94f96115..93b46be14688 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1946,6 +1946,13 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) c->cputype = CPU_XBURST; c->writecombine = _CACHE_UNCACHED_ACCELERATED; __cpu_name[cpu] = "Ingenic JZRISC"; + /* + * The XBurst core by default attempts to avoid branch target + * buffer lookups by detecting & special casing loops. This + * feature will cause BogoMIPS and lpj calculate in error. + * Set cp0 config7 bit 4 to disable this feature. + */ + set_c0_config7(MIPS_CONF7_BTB_LOOP_EN); break; default: panic("Unknown Ingenic Processor ID!"); |