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| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-07-09 11:40:36 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-08-26 15:23:03 +0200 |
| commit | 4e88a8621301b992e8e3422e08bfb604772f3338 (patch) | |
| tree | 8a643c240850d91b6a173a5a9c9df0351a368552 /arch/mips/kernel/pm-cps.c | |
| parent | MIPS: Add MIPS I6400 PRid and cputype identifiers (diff) | |
| download | linux-4e88a8621301b992e8e3422e08bfb604772f3338.tar.xz linux-4e88a8621301b992e8e3422e08bfb604772f3338.zip | |
MIPS: Add cases for CPU_I6400
Add a CPU_I6400 case to various switch statements, doing the same thing
as for CPU_P5600.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/pm-cps.c')
| -rw-r--r-- | arch/mips/kernel/pm-cps.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index 06147179a175..f63a289977cc 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c @@ -267,6 +267,7 @@ static int __init cps_gen_flush_fsb(u32 **pp, struct uasm_label **pl, /* CPUs which do not require the workaround */ case CPU_P5600: + case CPU_I6400: return 0; default: @@ -671,6 +672,7 @@ static int __init cps_pm_init(void) case CPU_PROAPTIV: case CPU_M5150: case CPU_P5600: + case CPU_I6400: stype_intervention = 0x2; stype_memory = 0x3; stype_ordering = 0x10; |