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| author | Matt Redfearn <matt.redfearn@imgtec.com> | 2016-09-07 11:45:11 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-10-04 16:13:57 +0200 |
| commit | b97d0b9099afcd5c569acaf9b0eb3f6e3b1b1f35 (patch) | |
| tree | c9b1026e10c9c1a7438e49d26e615c5417c410c4 /arch/mips/kernel/pm-cps.c | |
| parent | MIPS: CPC: Avoid lock when MIPS CM >= 3 is present (diff) | |
| download | linux-b97d0b9099afcd5c569acaf9b0eb3f6e3b1b1f35.tar.xz linux-b97d0b9099afcd5c569acaf9b0eb3f6e3b1b1f35.zip | |
MIPS: pm-cps: Change FSB workaround to CPU blacklist
The check for whether a CPU required the FSB flush workaround
previously required every CPU not requiring it to be whitelisted. That
approach does not scale well as new CPUs are introduced so change the
default from a WARN and returning an error to just returning 0. Any CPUs
requiring the workaround can then be added to the blacklist.
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14218/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/pm-cps.c')
| -rw-r--r-- | arch/mips/kernel/pm-cps.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index 5b31a9405ebc..2faa227a032e 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c @@ -272,14 +272,9 @@ static int __init cps_gen_flush_fsb(u32 **pp, struct uasm_label **pl, /* On older ones it's unavailable */ return -1; - /* CPUs which do not require the workaround */ - case CPU_P5600: - case CPU_I6400: - return 0; - default: - WARN_ONCE(1, "pm-cps: FSB flush unsupported for this CPU\n"); - return -1; + /* Assume that the CPU does not need this workaround */ + return 0; } /* |