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| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
| commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
| tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/kernel/smp.c | |
| parent | [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers. (diff) | |
| download | linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.xz linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.zip | |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smp.c')
| -rw-r--r-- | arch/mips/kernel/smp.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 73b0dab02668..500a7ec2880f 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -38,6 +38,7 @@ #include <asm/system.h> #include <asm/mmu_context.h> #include <asm/smp.h> +#include <asm/time.h> #ifdef CONFIG_MIPS_MT_SMTC #include <asm/mipsmtregs.h> @@ -70,6 +71,7 @@ asmlinkage __cpuinit void start_secondary(void) cpu_probe(); cpu_report(); per_cpu_trap_init(); + mips_clockevent_init(); prom_init_secondary(); /* |