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author | Huacai Chen <chenhc@lemote.com> | 2014-06-26 05:41:31 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 21:47:17 +0200 |
commit | ef2f826c8f2ff1e4215968042139604633581a13 (patch) | |
tree | 2e2cb70e0a16ade5ea70b0ef00ff67ff902d25d8 /arch/mips/pci/Makefile | |
parent | MIPS: Add Loongson-3B support (diff) | |
download | linux-ef2f826c8f2ff1e4215968042139604633581a13.tar.xz linux-ef2f826c8f2ff1e4215968042139604633581a13.zip |
MIPS: Loongson-3: Enable the COP2 usage
Loongson-3 has some specific instructions (MMI/SIMD) in coprocessor 2.
COP2 isn't independent because it share COP1 (FPU)'s registers. This
patch enable the COP2 usage so user-space programs can use the MMI/SIMD
instructions. When COP2 exception happens, we enable both COP1 (FPU)
and COP2, only in this way the fp context can be saved and restored
correctly.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7189/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/Makefile')
0 files changed, 0 insertions, 0 deletions