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authorThomas Bogendoerfer <tbogendoerfer@suse.de>2019-10-24 12:18:28 +0200
committerPaul Burton <paulburton@kernel.org>2019-11-01 22:58:49 +0100
commitb9e9defb5e603a8c0822c9e1f457fc823fab5a15 (patch)
tree654c91acb45b1c19c805e5c69b630008497136be /arch/mips
parentMerge tag 'mips_fixes_5.4_3' into mips-next (diff)
downloadlinux-b9e9defb5e603a8c0822c9e1f457fc823fab5a15.tar.xz
linux-b9e9defb5e603a8c0822c9e1f457fc823fab5a15.zip
MIPS: PCI: make phys_to_dma/dma_to_phys for pci-xtalk-bridge common
All platforms using pci-xtalk-bridge can share common phys_to_dma/ dma_to_phys function. So we move it form ip27 specific file to pci-xtalk-bridge.c Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pci/pci-ip27.c13
-rw-r--r--arch/mips/pci/pci-xtalk-bridge.c16
2 files changed, 16 insertions, 13 deletions
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 441eb9383b20..45a0be40c0c3 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -9,19 +9,6 @@
*/
#include <asm/pci/bridge.h>
-dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
- struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);
-
- return bc->baddr + paddr;
-}
-
-phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
-{
- return dma_addr & ~(0xffUL << 56);
-}
-
#ifdef CONFIG_NUMA
int pcibus_to_node(struct pci_bus *bus)
{
diff --git a/arch/mips/pci/pci-xtalk-bridge.c b/arch/mips/pci/pci-xtalk-bridge.c
index 312632171832..72e60df505f4 100644
--- a/arch/mips/pci/pci-xtalk-bridge.c
+++ b/arch/mips/pci/pci-xtalk-bridge.c
@@ -23,6 +23,22 @@
#define CRC16_VALID 0xb001
/*
+ * Common phys<->dma mapping for platforms using pci xtalk bridge
+ */
+dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);
+
+ return bc->baddr + paddr;
+}
+
+phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
+{
+ return dma_addr & ~(0xffUL << 56);
+}
+
+/*
* Most of the IOC3 PCI config register aren't present
* we emulate what is needed for a normal PCI enumeration
*/