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author | Breno Leitao <leitao@debian.org> | 2018-09-20 18:45:05 +0200 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-10-03 07:40:04 +0200 |
commit | 16d7c69c898531210d13dbd1eb2053759ff0946d (patch) | |
tree | d5a3d6e906bea9b3f4414678833574999ab392c8 /arch/powerpc/include/asm/dcr.h | |
parent | powerpc/64: add stack protector support (diff) | |
download | linux-16d7c69c898531210d13dbd1eb2053759ff0946d.tar.xz linux-16d7c69c898531210d13dbd1eb2053759ff0946d.zip |
powerpc: Redefine TIF_32BITS thread flag
Moving TIF_32BIT to use bit 20 instead of 4 in the task flag field.
This change is making room for an upcoming new task macro
(_TIF_SYSCALL_EMU) which is preferred to set a bit in the lower 16-bits
part of the word.
This upcoming flag macro will take part in a composed macro
(_TIF_SYSCALL_DOTRACE) which will contain other flags as well, and it is
preferred that the whole _TIF_SYSCALL_DOTRACE macro only sets the lower 16
bits of a word, so, it could be handled using immediate operations (as load
immediate, add immediate, ...) where the immediate operand (SI) is limited
to 16-bits.
Another possible solution would be using the LOAD_REG_IMMEDIATE() macro
to load a full 64-bits word immediate, but it takes 5 operations instead of
one.
Having TIF_32BITS being redefined to use an upper bit is not a problem
since there is only one place in the assembly code where TIF_32BIT is being
used, and it could be replaced with an operation with right shift (addis),
since it is used alone, i.e. not being part of a composed macro, which has
different bits set, and would require LOAD_REG_IMMEDIATE().
Tested on a 64 bits Big Endian machine running a 32 bits task.
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/dcr.h')
0 files changed, 0 insertions, 0 deletions