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| author | Jordan Niethe <jniethe5@gmail.com> | 2020-05-25 04:59:19 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-07-23 09:25:06 +0200 |
| commit | b6b54b42722a2393056c891c0d05cd8cc40eb776 (patch) | |
| tree | 3a0cffd4f9b0dfec34e46114749cfbae4ed5fa3e /arch/powerpc/include/asm/ppc-opcode.h | |
| parent | powerpc/perf: BHRB control to disable BHRB logic when not used (diff) | |
| download | linux-b6b54b42722a2393056c891c0d05cd8cc40eb776.tar.xz linux-b6b54b42722a2393056c891c0d05cd8cc40eb776.zip | |
powerpc/sstep: Add tests for prefixed integer load/stores
Add tests for the prefixed versions of the integer load/stores that
are currently tested. This includes the following instructions:
* Prefixed Load Doubleword (pld)
* Prefixed Load Word and Zero (plwz)
* Prefixed Store Doubleword (pstd)
Skip the new tests if ISA v3.1 is unsupported.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
[mpe: Fix conflicts with ppc-opcode.h changes]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200525025923.19843-1-jniethe5@gmail.com
Diffstat (limited to 'arch/powerpc/include/asm/ppc-opcode.h')
| -rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 6b7a3f0f2d62..90ae33a74d78 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -265,6 +265,14 @@ #define PPC_INST_BRANCH 0x48000000 #define PPC_INST_BRANCH_COND 0x40800000 +/* Prefixes */ +#define PPC_PREFIX_MLS 0x06000000 +#define PPC_PREFIX_8LS 0x04000000 + +/* Prefixed instructions */ +#define PPC_INST_PLD 0xe4000000 +#define PPC_INST_PSTD 0xf4000000 + /* macros to insert fields into opcodes */ #define ___PPC_RA(a) (((a) & 0x1f) << 16) #define ___PPC_RB(b) (((b) & 0x1f) << 11) @@ -296,6 +304,7 @@ #define __PPC_CT(t) (((t) & 0x0f) << 21) #define __PPC_SPR(r) ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11)) #define __PPC_RC21 (0x1 << 10) +#define __PPC_PRFX_R(r) (((r) & 0x1) << 20) /* * Both low and high 16 bits are added as SIGNED additions, so if low 16 bits |