diff options
| author | Paul Mackerras <paulus@ozlabs.org> | 2017-01-30 11:21:37 +0100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-01-31 09:11:45 +0100 |
| commit | dbcbfee0c81c7938e40d7d6bc659a5191f490b50 (patch) | |
| tree | b5268ee719c0808d48fc6920d2f9aadd77d1a3b6 /arch/powerpc/include/asm/reg.h | |
| parent | powerpc/64: Enable use of radix MMU under hypervisor on POWER9 (diff) | |
| download | linux-dbcbfee0c81c7938e40d7d6bc659a5191f490b50.tar.xz linux-dbcbfee0c81c7938e40d7d6bc659a5191f490b50.zip | |
powerpc/64: More definitions for POWER9
This adds definitions for bits in the DSISR register which are used
by POWER9 for various translation-related exception conditions, and
for some more bits in the partition table entry that will be needed
by KVM.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 0d4531aa2052..aa44a83ad3ec 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -274,10 +274,14 @@ #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ #define DSISR_NOHPTE 0x40000000 /* no translation found */ #define DSISR_PROTFAULT 0x08000000 /* protection fault */ +#define DSISR_BADACCESS 0x04000000 /* bad access to CI or G */ #define DSISR_ISSTORE 0x02000000 /* access was a store */ #define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ #define DSISR_NOSEGMENT 0x00200000 /* SLB miss */ #define DSISR_KEYFAULT 0x00200000 /* Key fault */ +#define DSISR_UNSUPP_MMU 0x00080000 /* Unsupported MMU config */ +#define DSISR_SET_RC 0x00040000 /* Failed setting of R/C bits */ +#define DSISR_PGDIRFAULT 0x00020000 /* Fault on page directory */ #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ #define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */ |