diff options
| author | Oliver O'Halloran <oohall@gmail.com> | 2017-07-06 10:46:43 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-07-11 04:53:53 +0200 |
| commit | 2400fd822f467cb4c886c879d8ad99feac9cf319 (patch) | |
| tree | dc297ddb52b2d7226da656e1d8a3d445985d9ce0 /arch/powerpc | |
| parent | powerpc/powernv: Fix local TLB flush for boot and MCE on POWER9 (diff) | |
| download | linux-2400fd822f467cb4c886c879d8ad99feac9cf319.tar.xz linux-2400fd822f467cb4c886c879d8ad99feac9cf319.zip | |
powerpc/asm: Mark cr0 as clobbered in mftb()
The workaround for the CELL timebase bug does not correctly mark cr0 as
being clobbered. This means GCC doesn't know that the asm block changes cr0 and
might leave the result of an unrelated comparison in cr0 across the block, which
we then trash, leading to basically random behaviour.
Fixes: 859deea949c3 ("[POWERPC] Cell timebase bug workaround")
Cc: stable@vger.kernel.org # v2.6.19+
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
[mpe: Tweak change log and flag for stable]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 7e50e47375d6..a3b6575c7842 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -1303,7 +1303,7 @@ static inline void msr_check_and_clear(unsigned long bits) " .llong 0\n" \ ".previous" \ : "=r" (rval) \ - : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL)); \ + : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \ rval;}) #else #define mftb() ({unsigned long rval; \ |