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| author | Vincent Chen <vincent.chen@sifive.com> | 2021-03-22 15:26:04 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-04-26 17:24:56 +0200 |
| commit | 1a0e5dbd3723e1194cc549def69fe7b557d4c72b (patch) | |
| tree | 6dc387216e93b22faaeb1ced56ce0b00b40aad8d /arch/riscv/include/asm/errata_list.h | |
| parent | riscv: Introduce alternative mechanism to apply errata solution (diff) | |
| download | linux-1a0e5dbd3723e1194cc549def69fe7b557d4c72b.tar.xz linux-1a0e5dbd3723e1194cc549def69fe7b557d4c72b.zip | |
riscv: sifive: Add SiFive alternative ports
Add required ports of the Alternative scheme for SiFive.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/include/asm/errata_list.h')
0 files changed, 0 insertions, 0 deletions