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authorAtish Patra <atish.patra@wdc.com>2021-11-18 09:39:12 +0100
committerAnup Patel <anup@brainfault.org>2022-01-06 10:42:47 +0100
commit3e1d86569c210ec64398091bd035e539f0e26e81 (patch)
tree1ecb3115039784c60c92d0d9ea9194166b28af61 /arch/riscv/include/asm/sbi.h
parentRISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2 (diff)
downloadlinux-3e1d86569c210ec64398091bd035e539f0e26e81.tar.xz
linux-3e1d86569c210ec64398091bd035e539f0e26e81.zip
RISC-V: KVM: Add SBI HSM extension in KVM
SBI HSM extension allows OS to start/stop harts any time. It also allows ordered booting of harts instead of random booting. Implement SBI HSM exntesion and designate the vcpu 0 as the boot vcpu id. All other non-zero non-booting vcpus should be brought up by the OS implementing HSM extension. If the guest OS doesn't implement HSM extension, only single vcpu will be available to OS. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'arch/riscv/include/asm/sbi.h')
-rw-r--r--arch/riscv/include/asm/sbi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 9e4c79fd49d7..9c46dd3ff4a2 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -90,6 +90,7 @@ enum sbi_hsm_hart_status {
#define SBI_ERR_INVALID_PARAM -3
#define SBI_ERR_DENIED -4
#define SBI_ERR_INVALID_ADDRESS -5
+#define SBI_ERR_ALREADY_AVAILABLE -6
extern unsigned long sbi_spec_version;
struct sbiret {