diff options
| author | Anup Patel <apatel@ventanamicro.com> | 2024-10-20 21:47:32 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-10-28 12:14:03 +0100 |
| commit | 68c72a6557b072bff79658b9c0fdb0e69148e32d (patch) | |
| tree | ea5948f1ff14a011f397766621575914b011ec54 /arch/riscv/include/asm | |
| parent | RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs (diff) | |
| download | linux-68c72a6557b072bff79658b9c0fdb0e69148e32d.tar.xz linux-68c72a6557b072bff79658b9c0fdb0e69148e32d.zip | |
RISC-V: KVM: Use SBI sync SRET call when available
Implement an optimized KVM world-switch using SBI sync SRET call
when SBI nested acceleration extension is available. This improves
KVM world-switch when KVM RISC-V is running as a Guest under some
other hypervisor.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-12-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/include/asm')
| -rw-r--r-- | arch/riscv/include/asm/kvm_nacl.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/kvm_nacl.h b/arch/riscv/include/asm/kvm_nacl.h index 8f3e3ebf5017..4124d5e06a0f 100644 --- a/arch/riscv/include/asm/kvm_nacl.h +++ b/arch/riscv/include/asm/kvm_nacl.h @@ -12,6 +12,8 @@ #include <asm/csr.h> #include <asm/sbi.h> +struct kvm_vcpu_arch; + DECLARE_STATIC_KEY_FALSE(kvm_riscv_nacl_available); #define kvm_riscv_nacl_available() \ static_branch_unlikely(&kvm_riscv_nacl_available) @@ -43,6 +45,10 @@ void __kvm_riscv_nacl_hfence(void *shmem, unsigned long page_num, unsigned long page_count); +void __kvm_riscv_nacl_switch_to(struct kvm_vcpu_arch *vcpu_arch, + unsigned long sbi_ext_id, + unsigned long sbi_func_id); + int kvm_riscv_nacl_enable(void); void kvm_riscv_nacl_disable(void); |