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author | Borislav Petkov (AMD) <bp@alien8.de> | 2023-08-07 10:46:04 +0200 |
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committer | Borislav Petkov (AMD) <bp@alien8.de> | 2023-08-07 10:53:08 +0200 |
commit | 5a15d8348881e9371afdf9f5357a135489496955 (patch) | |
tree | 477c10789c4ac4d317cc375926e6eda917baf0d3 /arch/x86/include/asm/msr-index.h | |
parent | x86/srso: Add a forgotten NOENDBR annotation (diff) | |
download | linux-5a15d8348881e9371afdf9f5357a135489496955.tar.xz linux-5a15d8348881e9371afdf9f5357a135489496955.zip |
x86/srso: Tie SBPB bit setting to microcode patch detection
The SBPB bit in MSR_IA32_PRED_CMD is supported only after a microcode
patch has been applied so set X86_FEATURE_SBPB only then. Otherwise,
guests would attempt to set that bit and #GP on the MSR write.
While at it, make SMT detection more robust as some guests - depending
on how and what CPUID leafs their report - lead to cpu_smt_control
getting set to CPU_SMT_NOT_SUPPORTED but SRSO_NO should be set for any
guest incarnation where one simply cannot do SMT, for whatever reason.
Fixes: fb3bd914b3ec ("x86/srso: Add a Speculative RAS Overflow mitigation")
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reported-by: Salvatore Bonaccorso <carnil@debian.org>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
0 files changed, 0 insertions, 0 deletions