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| author | Lai Jiangshan <laijs@linux.alibaba.com> | 2021-11-08 13:43:57 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-12-08 10:25:00 +0100 |
| commit | a37ebdce168f57732ff2917a685980fc21133417 (patch) | |
| tree | 445ed163f79e972b572241a56f955ffca12bff08 /arch/x86/kvm/kvm_cache_regs.h | |
| parent | KVM: VMX: Add and use X86_CR4_TLBFLUSH_BITS when !enable_ept (diff) | |
| download | linux-a37ebdce168f57732ff2917a685980fc21133417.tar.xz linux-a37ebdce168f57732ff2917a685980fc21133417.zip | |
KVM: VMX: Add and use X86_CR4_PDPTR_BITS when !enable_ept
In set_cr4_guest_host_mask(), all cr4 pdptr bits are already set to be
intercepted in an unclear way.
Add X86_CR4_PDPTR_BITS to make it clear and self-documented.
No functionality changed.
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
Message-Id: <20211108124407.12187-6-jiangshanlai@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/kvm_cache_regs.h')
| -rw-r--r-- | arch/x86/kvm/kvm_cache_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h index 828f55ce816b..7c9f6455fc04 100644 --- a/arch/x86/kvm/kvm_cache_regs.h +++ b/arch/x86/kvm/kvm_cache_regs.h @@ -10,6 +10,7 @@ | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE) #define X86_CR4_TLBFLUSH_BITS (X86_CR4_PGE | X86_CR4_PCIDE | X86_CR4_PAE | X86_CR4_SMEP) +#define X86_CR4_PDPTR_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_SMEP) #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \ static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\ |