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author | Tony Luck <tony.luck@intel.com> | 2019-05-06 13:13:22 +0200 |
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committer | Borislav Petkov <bp@suse.de> | 2019-06-08 17:39:24 +0200 |
commit | 60fd42d26cc7ec8847598da50ebf27e3c9647d7b (patch) | |
tree | d945852ed161d0b9349a8e2037cda5c8e31a6c55 /arch/x86/ras | |
parent | RAS/CEC: Dump the different array element sections (diff) | |
download | linux-60fd42d26cc7ec8847598da50ebf27e3c9647d7b.tar.xz linux-60fd42d26cc7ec8847598da50ebf27e3c9647d7b.zip |
RAS/CEC: Add CONFIG_RAS_CEC_DEBUG and move CEC debug features there
The pfn and array files in (debugfs)/ras/cec are intended for debugging
the CEC code itself. They are not needed on production systems, so the
default setting for this CONFIG option is "n".
[ bp: Have it with less ifdeffery by using IS_ENABLED(). ]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/x86/ras')
-rw-r--r-- | arch/x86/ras/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/ras/Kconfig b/arch/x86/ras/Kconfig index a9c3db125222..9ad6842de4b4 100644 --- a/arch/x86/ras/Kconfig +++ b/arch/x86/ras/Kconfig @@ -11,3 +11,13 @@ config RAS_CEC Bear in mind that this is absolutely useless if your platform doesn't have ECC DIMMs and doesn't have DRAM ECC checking enabled in the BIOS. + +config RAS_CEC_DEBUG + bool "CEC debugging machinery" + default n + depends on RAS_CEC + help + Add extra files to (debugfs)/ras/cec to test the correctable error + collector feature. "pfn" is a writable file that allows user to + simulate an error in a particular page frame. "array" is a read-only + file that dumps out the current state of all pages logged so far. |