diff options
| author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2009-04-09 15:07:29 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-04-10 14:21:42 +0200 |
| commit | 845d8c761ec763871936c62b837c4a9ea6d0fbdb (patch) | |
| tree | 5ce2589da0c32327ce35fdb4126b64d1da23b99c /arch/x86 | |
| parent | x86: cacheinfo: use L3 cache index disable feature only for CPUs that support it (diff) | |
| download | linux-845d8c761ec763871936c62b837c4a9ea6d0fbdb.tar.xz linux-845d8c761ec763871936c62b837c4a9ea6d0fbdb.zip | |
x86: cacheinfo: correct return value when cache_disable feature is not active
Impact: bug fix
If user writes to "cache_disable" attribute on a CPU that does not support
this feature, the process hangs due to an invalid return value in
store_cache_disable().
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Mark Langsdorf <mark.langsdorf@amd.com>
LKML-Reference: <20090409130729.GH31527@alberich.amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/intel_cacheinfo.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 72401264912c..1ab46e05adf0 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -771,7 +771,7 @@ store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, unsigned int ret, index, val; if (!this_leaf->can_disable) - return 0; + return -EINVAL; if (strlen(buf) > 15) return -EINVAL; |