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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-22 23:04:41 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-22 23:04:41 +0200
commit433bcf67370bc170a345634aa1be4ee8ac905de9 (patch)
treef2a7afc2ccc3346515e8e12208f3b2bff4e84f33 /arch/xtensa/Kconfig
parentMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm (diff)
parentMerge branch 'xtensa-dma-fixes' (early part) into xtensa-fixes (diff)
downloadlinux-433bcf67370bc170a345634aa1be4ee8ac905de9.tar.xz
linux-433bcf67370bc170a345634aa1be4ee8ac905de9.zip
Merge tag 'xtensa-20180820' of git://github.com/jcmvbkbc/linux-xtensa
Pull Xtensa updates from Max Filippov: - switch xtensa arch to the generic noncoherent direct mapping operations - add support for DMA_ATTR_NO_KERNEL_MAPPING attribute - clean up users of platform/hardware.h in generic Xtensa code - fix assembly cache maintenance code for long cache lines - rework noMMU cache attributes initialization - add big-endian HiFi2 test_kc705_be CPU variant * tag 'xtensa-20180820' of git://github.com/jcmvbkbc/linux-xtensa: xtensa: add test_kc705_be variant xtensa: clean up boot-elf/bootstrap.S xtensa: make bootparam parsing optional xtensa: drop variant IRQ support xtensa: drop unneeded platform/hardware.h headers xtensa: move PLATFORM_NR_IRQS to Kconfig xtensa: rework {CONFIG,PLATFORM}_DEFAULT_MEM_START xtensa: drop unused {CONFIG,PLATFORM}_DEFAULT_MEM_SIZE xtensa: rework noMMU cache attributes initialization xtensa: increase ranges in ___invalidate_{i,d}cache_all xtensa: limit offsets in __loop_cache_{all,page} xtensa: platform-specific handling of coherent memory xtensa: support DMA_ATTR_NO_KERNEL_MAPPING attribute xtensa: use generic dma_noncoherent_ops
Diffstat (limited to 'arch/xtensa/Kconfig')
-rw-r--r--arch/xtensa/Kconfig60
1 files changed, 39 insertions, 21 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 801491e98890..04d038f3b6fa 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -4,12 +4,15 @@ config ZONE_DMA
config XTENSA
def_bool y
+ select ARCH_HAS_SYNC_DMA_FOR_CPU
+ select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_IPC_PARSE_VERSION
select BUILDTIME_EXTABLE_SORT
select CLONE_BACKWARDS
select COMMON_CLK
+ select DMA_NONCOHERENT_OPS
select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_SHOW
@@ -72,9 +75,6 @@ config TRACE_IRQFLAGS_SUPPORT
config MMU
def_bool n
-config VARIANT_IRQ_SWITCH
- def_bool n
-
config HAVE_XTENSA_GPIO32
def_bool n
@@ -244,6 +244,23 @@ config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
If in doubt, say Y.
+config MEMMAP_CACHEATTR
+ hex "Cache attributes for the memory address space"
+ depends on !MMU
+ default 0x22222222
+ help
+ These cache attributes are set up for noMMU systems. Each hex digit
+ specifies cache attributes for the corresponding 512MB memory
+ region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
+ bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
+
+ Cache attribute values are specific for the MMU type, so e.g.
+ for region protection MMUs: 2 is cache bypass, 4 is WB cached,
+ 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
+ bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
+ 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
+ reserved).
+
config KSEG_PADDR
hex "Physical address of the KSEG mapping"
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
@@ -413,6 +430,10 @@ config XTENSA_PLATFORM_XTFPGA
endchoice
+config PLATFORM_NR_IRQS
+ int
+ default 3 if XTENSA_PLATFORM_XT2000
+ default 0
config XTENSA_CPU_CLOCK
int "CPU clock rate [MHz]"
@@ -450,6 +471,15 @@ config BUILTIN_DTB
string "DTB to build into the kernel image"
depends on OF
+config PARSE_BOOTPARAM
+ bool "Parse bootparam block"
+ default y
+ help
+ Parse parameters passed to the kernel from the bootloader. It may
+ be disabled if the kernel is known to run without the bootloader.
+
+ If unsure, say Y.
+
config BLK_DEV_SIMDISK
tristate "Host file-based simulated block device support"
default n
@@ -506,25 +536,13 @@ config PLATFORM_WANT_DEFAULT_MEM
def_bool n
config DEFAULT_MEM_START
- hex "Physical address of the default memory area start"
- depends on PLATFORM_WANT_DEFAULT_MEM
- default 0x00000000 if MMU
- default 0x60000000 if !MMU
- help
- This is the base address of the default memory area.
- Default memory area has platform-specific meaning, it may be used
- for e.g. early cache initialization.
-
- If unsure, leave the default value here.
-
-config DEFAULT_MEM_SIZE
- hex "Maximal size of the default memory area"
- depends on PLATFORM_WANT_DEFAULT_MEM
- default 0x04000000
+ hex
+ prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
+ default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
+ default 0x00000000
help
- This is the size of the default memory area.
- Default memory area has platform-specific meaning, it may be used
- for e.g. early cache initialization.
+ This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
+ in noMMU configurations.
If unsure, leave the default value here.