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author | Max Filippov <jcmvbkbc@gmail.com> | 2023-06-14 01:51:18 +0200 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2023-06-14 06:56:27 +0200 |
commit | f29cf77609cc401d28e2e7ec5c57d9d178ef347d (patch) | |
tree | 54198dcf0f6c2fd2d1720845d9b1f2302211cb55 /arch/xtensa/kernel/setup.c | |
parent | xtensa: rearrange unaligned exception handler (diff) | |
download | linux-f29cf77609cc401d28e2e7ec5c57d9d178ef347d.tar.xz linux-f29cf77609cc401d28e2e7ec5c57d9d178ef347d.zip |
xtensa: add load/store exception handler
Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/setup.c')
-rw-r--r-- | arch/xtensa/kernel/setup.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 09ab4d83faf8..aba3ff4e60d8 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -245,7 +245,8 @@ void __init init_arch(bp_tag_t *bp_start) { /* Initialize basic exception handling if configuration may need it */ - if (IS_ENABLED(CONFIG_KASAN)) + if (IS_ENABLED(CONFIG_KASAN) || + IS_ENABLED(CONFIG_XTENSA_LOAD_STORE)) early_trap_init(); /* Initialize MMU. */ |